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ICCAD
1999
IEEE
90views Hardware» more  ICCAD 1999»
14 years 1 months ago
An implicit connection graph maze routing algorithm for ECO routing
Abstract-- ECO routing is a very important design capability in advanced IC, MCM and PCB designs when additional routings need to be made at the latter stage of the physical design...
Jason Cong, Jie Fang, Kei-Yong Khoo
EURODAC
1995
IEEE
137views VHDL» more  EURODAC 1995»
14 years 11 days ago
A formal non-heuristic ATPG approach
This paper presents a formal approach to test combinational circuits. For the sake of explanation we describe the basic algorithms with the help of the stuck–at fault model. Ple...
Manfred Henftling, Hannes C. Wittmann, Kurt Antrei...
CASCON
1993
117views Education» more  CASCON 1993»
13 years 10 months ago
Documenting-in-the-large vs. documenting-in-the-small
There is a signi cant di erence between documentinglarge programs and documenting small ones. By large programs we mean on the order of 1,000,000 lines, usually written by many di...
Scott R. Tilley
ICCAD
1996
IEEE
92views Hardware» more  ICCAD 1996»
14 years 29 days ago
Generation of BDDs from hardware algorithm descriptions
We propose a new method for generating BDDs from hardware algorithm descriptions written in a programming language. Our system can deal with control structures, such as conditiona...
Shin-ichi Minato
DAC
2006
ACM
14 years 9 months ago
SAT sweeping with local observability don't-cares
SAT sweeping is a method for simplifying an AND/INVERTER graph (AIG) by systematically merging graph vertices from the inputs towards the outputs using a combination of structural...
Qi Zhu, Nathan Kitchen, Andreas Kuehlmann, Alberto...