1602 search results - page 161 / 321 » Database Architectures for New Hardware |
ICCAD
2002
IEEE
14 years 5 months ago
2002
IEEE
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
APCCAS
2006
IEEE
14 years 3 months ago
2006
IEEE
—The Massey-Omura multiplier is a well-known sequential multiplier over finite fields GF(2m ), which can perform multiplication in m clock cycles for the normal basis. In this ar...
ASAP
2002
IEEE
14 years 2 months ago
2002
IEEE
This paper introduces PAPA: Packed Arithmetic on a Prefix Adder, a new approach to parallel prefix adder design that supports a wide variety of packed arithmetic computations, inc...
ISSS
2002
IEEE
14 years 1 months ago
2002
IEEE
This paper presents a new technique for global energy optimization through coordinated functional partitioning and speed selection for embedded processors interconnected by a high...
ISMVL
2010
IEEE
14 years 1 months ago
2010
IEEE
This paper proposes a new architecture for memorybased floating-point numeric function generators (NFGs). The design method uses piecewise-split edge-valued multivalued decision ...