1581 search results - page 76 / 317 » Date Warehouse Design |
127
click to vote
DATE
1997
IEEE
15 years 7 months ago
1997
IEEE
This paper presents a testability analysis and improvement technique for the controller of an RT level design. It detects hard-to-reachstates by analyzing both the data path and t...
135
Voted
DATE
2009
IEEE
15 years 7 months ago
2009
IEEE
Subthreshold logic is showing good promise as a viable ultra-low-power circuit design technique for powerlimited applications. For this design technique to gain widespread adoption...
137
Voted
DATE
2006
IEEE
15 years 7 months ago
2006
IEEE
The advent of multi-core embedded processors has brought along new challenges for embedded system design. This paper presents an efficient, battery aware, code partitioning techni...
119
click to vote
DATE
1999
IEEE
15 years 7 months ago
1999
IEEE
We propose a conceptual framework, called the Rugby Model, in which designs, design processes and design tools can be studied. It is an extension of the Y chart and adds two dimen...
130
click to vote
DATE
1997
IEEE
15 years 7 months ago
1997
IEEE
In modern computer systems the performance is dominated by the memory performance. Currently, there is neither a systematic design methodology nor a tool for the design of memory ...