124 search results - page 6 / 25 » Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digi... |
MJ
2007
13 years 7 months ago
2007
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
A digital combinational logic circuit is reversible if it maps each input pattern to a unique output pattern. Such circuits are of interest in quantum computing, optical computing...
DATE
1999
IEEE
13 years 12 months ago
1999
IEEE
This paper presents a new Design for Testability (DFT) technique for Current-Mode Logic (CML) circuits. This new technique, with little overhead, using built-in detectors, monitor...
JUCS
2007
13 years 7 months ago
2007
: It is a difficult problem that using cellular neural network to make up of analog signal processing circuit. This paper presented the architecture of new cellular neural network ...
ISQED
2005
IEEE
14 years 1 months ago
2005
IEEE
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...