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159
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ICCD
2007
IEEE
205views Hardware» more  ICCD 2007»
16 years 1 months ago
Hardware libraries: An architecture for economic acceleration in soft multi-core environments
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...
David Meisner, Sherief Reda
180
Voted
BMCBI
2006
128views more  BMCBI 2006»
15 years 4 months ago
Model-driven user interfaces for bioinformatics data resources: regenerating the wheel as an alternative to reinventing it
Background: The proliferation of data repositories in bioinformatics has resulted in the development of numerous interfaces that allow scientists to browse, search and analyse the...
Kevin L. Garwood, Christopher Garwood, Cornelia He...
FAST
2009
15 years 2 months ago
PARDA: Proportional Allocation of Resources for Distributed Storage Access
Rapid adoption of virtualization technologies has led to increased utilization of physical resources, which are multiplexed among numerous workloads with varying demands and impor...
Ajay Gulati, Irfan Ahmad, Carl A. Waldspurger
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
15 years 9 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
SC
2000
ACM
15 years 9 months ago
MPICH-GQ: Quality-of-Service for Message Passing Programs
Parallel programmers typically assume that all resources required for a program’s execution are dedicated to that purpose. However, in local and wide area networks, contention f...
Alain J. Roy, Ian T. Foster, William Gropp, Nichol...