529 search results - page 69 / 106 » Design and Test Space Exploration of Transport-Triggered Arc... |
GECCO
2008
Springer
13 years 10 months ago
2008
Springer
We attack the problem of game balancing by using a coevolutionary algorithm to explore the space of possible game strategies and counter strategies. We define balanced games as g...
SIGMETRICS
2008
ACM
13 years 8 months ago
2008
ACM
Local network coding is growing in prominence as a technique to facilitate greater capacity utilization in multi-hop wireless networks. A specific objective of such local network ...
ICCAD
2004
IEEE
14 years 5 months ago
2004
IEEE
In this paper we study the technology mapping problem for FPGA architectures to minimize chip area, or the total number of lookup tables (LUTs) of the mapped design, under the chi...
CSREAESA
2006
13 years 10 months ago
2006
Modern processors have a small on-chip local memory for instructions. Usually it is in the form of a cache but in some cases it is an addressable memory. In the latter, the user is...
RSP
2005
IEEE
14 years 2 months ago
2005
IEEE
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...