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» Design issues for dynamic voltage scaling
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DATE
2004
IEEE
132views Hardware» more  DATE 2004»
13 years 11 months ago
Hybrid Architectural Dynamic Thermal Management
When an application or external environmental conditions cause a chip's cooling capacity to be exceeded, dynamic thermal management (DTM) dynamically reduces the power densit...
Kevin Skadron
CASES
2004
ACM
14 years 25 days ago
Reducing both dynamic and leakage energy consumption for hard real-time systems
While the dynamic voltage scaling (DVS) techniques are efficient in reducing the dynamic energy consumption for the processor, varying voltage alone becomes less effective for t...
Linwei Niu, Gang Quan
ISLPED
2003
ACM
129views Hardware» more  ISLPED 2003»
14 years 19 days ago
A critical analysis of application-adaptive multiple clock processors
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...
Emil Talpes, Diana Marculescu
DAC
1998
ACM
14 years 8 months ago
Reducing Power in High-Performance Microprocessors
Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is ...
Vivek Tiwari, Deo Singh, Suresh Rajgopal, Gaurav M...
MICRO
2009
IEEE
134views Hardware» more  MICRO 2009»
14 years 2 months ago
A case for dynamic frequency tuning in on-chip networks
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...
Asit K. Mishra, Reetuparna Das, Soumya Eachempati,...