2's complement number system imposes a fundamental limitation on the power and performance of arithmetic circuits, due to the fundamental need of cross-datapath carry propaga...
Rooju Chokshi, Krzysztof S. Berezowski, Aviral Shr...
This paper presents a versatile scheduling model and an efficient control synthesis methodology which enables architectural (high-level) design/synthesis systems to seamlessly su...
Complex signal processing algorithms are specified in floating point precision. When their hardware implementation requires fixed point precision, type refinement is needed. The p...
Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge...
In the paper the problem of processor/compiler codesign for digital signal processing and embedded SYstems is discussed. The main principle we follow is the top-down approach char...
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...