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ASAP
2007
IEEE
175views Hardware» more  ASAP 2007»
13 years 8 months ago
Scalable Multi-FPGA Platform for Networks-On-Chip Emulation
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...
Abdellah-Medjadji Kouadri-Mostefaoui, Benaoumeur S...
VLSID
2005
IEEE
102views VLSI» more  VLSID 2005»
14 years 7 months ago
Integrated On-Chip Storage Evaluation in ASIP Synthesis
An Application Specific Instruction Set Processor (ASIP) exploits special characteristics of the given application(s) to meet the desired performance, cost and power requirements....
Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
DAC
2006
ACM
14 years 7 months ago
Design space exploration and prototyping for on-chip multimedia applications
Ümit Y. Ogras, Hyung Gyu Lee, Naehyuck Chang,...
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
14 years 3 months ago
Reliability Support for On-Chip Memories Using Networks-on-Chip
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
Federico Angiolini, David Atienza, Srinivasan Mura...
IMS
2000
123views Hardware» more  IMS 2000»
13 years 10 months ago
Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler
Many architectural ideas that appear to be useful from a hardware standpoint fail to achieve wide acceptance due to lack of compiler support. In this paper we explore the design of...
David Judd, Katherine A. Yelick, Christoforos E. K...