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EURODAC
1995
IEEE
117views VHDL» more  EURODAC 1995»
15 years 9 months ago
Performance-complexity analysis in hardware-software codesign for real-time systems
The paper presents an approach for performance and complexity analysis of hardware/software implementations for real-time systems on every stage of the partitioning. There are two...
Victor V. Toporkov
DAC
2008
ACM
16 years 7 months ago
Specify-explore-refine (SER): from specification to implementation
Driven by increasing complexity and reliability demands, the Japanese Aerospace Exploration Agency (JAXA) in 2004 commissioned development of ELEGANT, a complete SpecC-based envir...
Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Dani...
WADS
2009
Springer
291views Algorithms» more  WADS 2009»
16 years 20 days ago
On the Power of the Semi-Separated Pair Decomposition
Abstract. A Semi-Separated Pair Decomposition (SSPD), with parameter s > 1, of a set S ⊂ Rd is a set {(Ai, Bi)} of pairs of subsets of S such that for each i, there are balls ...
Mohammad Ali Abam, Paz Carmi, Mohammad Farshi, Mic...
ERSA
2010
186views Hardware» more  ERSA 2010»
15 years 4 months ago
DAPR: Design Automation for Partially Reconfigurable FPGAs
Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requirements...
Shaon Yousuf, Ann Gordon-Ross
ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
15 years 11 months ago
Energy/Power Estimation of Regular Processor Arrays
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
Sanjay V. Rajopadhye, Steven Derrien