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152
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DATE
1998
IEEE
15 years 10 months ago
1998
IEEE
Interconnect tuning is an increasingly critical degree of freedom in the physical design of high-performance VLSI systems. By interconnect tuning, we refer to the selection of lin...
155
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ISCA
2010
IEEE
15 years 10 months ago
2010
IEEE
As leakage and other charge storage limitations begin to impair the scalability of DRAM, non-volatile resistive memories are being developed as a potential replacement. Unfortunat...
156
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ASPDAC
1995
ACM
15 years 9 months ago
1995
ACM
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
160
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CSCW
2008
ACM
15 years 7 months ago
2008
ACM
When involved in collaborative tasks, users often choose to use multi-synchronous applications in order to concurrently work in isolation. Hence, privacy of their changes is maint...
175
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WSC
1998
15 years 7 months ago
1998
The High Level Architecture (HLA) for distributed simulations was proposed by the Defense Modeling and Simulation Office of the Department of Defense (DOD) in order to support int...