397 search results - page 67 / 80 » Designing Fast Asynchronous Circuits |
DAC
2010
ACM
13 years 2 months ago
2010
ACM
This paper presents a logic restructuring technique named node addition and removal (NAR). It works by adding a node into a circuit to replace an existing node and then removing t...
DAC
2004
ACM
13 years 11 months ago
2004
ACM
The ability to control the variations in IC fabrication process is rapidly diminishing as feature sizes continue towards the sub-100 nm regime. As a result, there is an increasing...
ICCD
1999
IEEE
13 years 11 months ago
1999
IEEE
With the reducing distances between wires in deep submicron technologies, coupling capacitances are becoming significant as their magnitude becomes comparable to the area capacita...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
As the technology progresses, interconnect delays have become bottlenecks of chip performance. Three dimensional (3D) integrated circuits are proposed as one way to address this p...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— Due to continuous technology scaling, the reduction of nodal capacitances and the lowering of power supply voltages result in an ever decreasing minimal charge capable of upset...