2945 search results - page 73 / 589 » Designing and Implementing Malicious Hardware |
134
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PREMI
2005
Springer
15 years 10 months ago
2005
Springer
In this paper we present and analyze an artificial neural network hardware engine, its architecture and implementation. The engine was designed to solve performance problems of the...
132
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ASPDAC
2001
ACM
15 years 8 months ago
2001
ACM
This paper describes a novel approach to high-level synthesis of complex pipelined circuits, including pipelined circuits with feedback. This approach combines a high-level, modula...
ISCAS
1993
IEEE
15 years 8 months ago
1993
IEEE
- A novel VLSI implementation of the Viterbi algorithm based on a cascade architecture is presented. Survivor sequence memory management is implemented using a new single read poin...
118
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DATE
2004
IEEE
15 years 8 months ago
2004
IEEE
Abstract-- Digital designs can be mapped to different implementations using diverse approaches, with varying cost criteria. Post-processing transforms, such as transistor sizing ca...
144
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DATE
2005
IEEE
15 years 10 months ago
2005
IEEE
In the RESUME project we explore the use of reconfigurable hardware for the design of portable multimedia systems by developing a scalable wavelet-based video codec. A scalable v...