1226 search results - page 18 / 246 » Designing systems-on-chip using cores |
146
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ASPDAC
2000
ACM
15 years 9 months ago
2000
ACM
Testing embedded memories is becoming an industry-wide concern with the advent of deep-submicron technology and system-on-chip applications. We present a prototype chip for a progr...
167
Voted
LCN
2003
IEEE
15 years 11 months ago
2003
IEEE
Optoelectronic integrated circuits can support thousands of integrated optical laser diodes and photodetectors bonded to a high-performance CMOS substrate, and can be used in the ...
230
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HIPEAC
2011
Springer
14 years 5 months ago
2011
Springer
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
192
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NOCS
2008
IEEE
16 years 11 days ago
2008
IEEE
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
141
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FPL
2003
Springer
15 years 11 months ago
2003
Springer
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...