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ICCAD
2002
IEEE
157views Hardware» more  ICCAD 2002»
14 years 4 months ago
Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads
Dynamic voltage scaling (DVS) reduces the power consumption of processors when peak performance is unnecessary. However, the achievable power savings by DVS alone is becoming limi...
Steven M. Martin, Krisztián Flautner, Trevo...
PLDI
2003
ACM
14 years 23 days ago
Compile-time dynamic voltage scaling settings: opportunities and limits
With power-related concerns becoming dominant aspects of hardware and software design, significant research effort has been devoted towards system power minimization. Among run-t...
Fen Xie, Margaret Martonosi, Sharad Malik
ISCAS
2005
IEEE
183views Hardware» more  ISCAS 2005»
14 years 1 months ago
Battery-aware dynamic voltage scaling in multiprocessor embedded system
— In a battery powered system, a primary design consideration is the battery lifetime. Profile of current drawn from a battery determines its lifetime. Recently in [4] dynamic v...
Yuan Cai, Sudhakar M. Reddy, Irith Pomeranz, Bashi...
DATE
2004
IEEE
151views Hardware» more  DATE 2004»
13 years 11 months ago
Dynamic Voltage and Cache Reconfiguration for Low Power
Given a set of real-time tasks scheduled using the earliest deadline first (EDF) algorithm, we discuss two techniques for reducing power consumption while meeting all timing requi...
André C. Nácul, Tony Givargis
ISCAS
2007
IEEE
103views Hardware» more  ISCAS 2007»
14 years 1 months ago
Multi-Vth Level Conversion Circuits for Multi-VDD Systems
— Employing multiple supply voltages (multi-VDD) is attractive for reducing the power consumption without sacrificing the speed of an integrated circuit (IC). In order to transfe...
Sherif A. Tawfik, Volkan Kursun