16 search results - page 3 / 4 » Deterministic BIST with Partial Scan |
VTS
2003
IEEE
14 years 22 days ago
2003
IEEE
Reseeding is used to improve fault coverage of pseudorandom testing. The seed corresponds to the initial state of the LFSR before filling the scan chain. The number of determinist...
ETS
2009
IEEE
13 years 5 months ago
2009
IEEE
Structural on-line self-test may be performed to detect permanent faults and avoid their accumulation. This paper improves concurrent BIST techniques based on a deterministic test ...
ICCAD
1996
IEEE
13 years 11 months ago
1996
IEEE
State justification is a time-consuming operation in test generation for sequential circuits. In this paper, we present a technique to rapidly identify state elements (flip-flops)...
DATE
2003
IEEE
14 years 23 days ago
2003
IEEE
Data correlation is a well-known problem that causes difficulty in VLSI testing. Based on a correlation metric, an efficient heuristic to select BIST registers has been proposed...
STOC
1989
ACM
13 years 11 months ago
1989
ACM
This paper takes the next step in developing the theory of average case complexity initiated by Leonid A Levin. Previous works Levin 84, Gurevich 87, Venkatesan and Levin 88] have...