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DATE
1998
IEEE
141views Hardware» more  DATE 1998»
13 years 12 months ago
Address Bus Encoding Techniques for System-Level Power Optimization
The power dissipated by system-level buses is the largest contribution to the global power of complex VLSI circuits. Therefore, the minimization of the switching activity at the I...
Luca Benini, Giovanni De Micheli, Donatella Sciuto...
ISLPED
1996
ACM
100views Hardware» more  ISLPED 1996»
13 years 11 months ago
Basic experimentation on accuracy of power estimation for CMOS VLSI circuits
In this paper, we discuss on accuracy of several kinds of power dissipation model for CMOS VLSI circuits. Some researchers have proposed several efficient power estimation methods...
Tohru Ishihara, Hiroto Yasuura
ISLPED
2003
ACM
113views Hardware» more  ISLPED 2003»
14 years 25 days ago
Reducing power density through activity migration
Power dissipation is unevenly distributed in modern microprocessors leading to localized hot spots with significantly greater die temperature than surrounding cooler regions. Exc...
Seongmoo Heo, Kenneth C. Barr, Krste Asanovic
ICCAD
1994
IEEE
144views Hardware» more  ICCAD 1994»
13 years 11 months ago
Power analysis of embedded software: a first step towards software power minimization
Embedded computer systems are characterized by the presence of a dedicated processor and the software that runs on it. Power constraints are increasingly becoming the critical com...
Vivek Tiwari, Sharad Malik, Andrew Wolfe
MICRO
2003
IEEE
124views Hardware» more  MICRO 2003»
14 years 25 days ago
Optimum Power/Performance Pipeline Depth
The impact of pipeline length on both the power and performance of a microprocessor is explored both theoretically and by simulation. A theory is presented for a wide range of pow...
Allan Hartstein, Thomas R. Puzak