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VTS
2003
IEEE
87views Hardware» more  VTS 2003»
14 years 2 months ago
An Analog Checker with Dynamically Adjustable Error Threshold for Fully Differential Circuits
We present a novel analog checker that adjusts dynamically the error threshold to the magnitude of its input signals. We demonstrate that this property is crucial for accurate con...
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
ICCAD
2000
IEEE
171views Hardware» more  ICCAD 2000»
14 years 1 months ago
A Parametric Test Method for Analog Components in Integrated Mixed-Signal Circuits
In this paper, we present a novel approach to use test stimuli generated by digital components of a mixed-signal circuit for testing its analog components. A wavelet transform is ...
Michael Pronath, Volker Gloeckel, Helmut E. Graeb
ISQED
2000
IEEE
131views Hardware» more  ISQED 2000»
14 years 1 months ago
Low Power Testing of VLSI Circuits: Problems and Solutions
Power and energy consumption of digital systems may increase significantly during testing. This extra power consumption due to test application may give rise to severe hazards to ...
Patrick Girard
ICCAD
2003
IEEE
105views Hardware» more  ICCAD 2003»
14 years 5 months ago
TAM Optimization for Mixed-Signal SOCs using Analog Test Wrappers
We present a new approach for TAM optimization and test scheduling in the modular testing of mixed-signal SOCs. A test planning approach for digital SOCs is extended to handle ana...
Anuja Sehgal, Sule Ozev, Krishnendu Chakrabarty
EH
1999
IEEE
141views Hardware» more  EH 1999»
14 years 1 months ago
On-Line Evolution of FPGA-Based Circuits: A Case Study on Hash Functions
An evolutionary algorithm is used to evolve a digital circuit which computes a simple hash function mapping a 16bit address space into an 8-bit one. The target technology is FPGA,...
Ernesto Damiani, Andrea Tettamanzi, Valentino Libe...