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HPCA
2002
IEEE
16 years 4 months ago
Microarchitectural Simulation and Control of di/dt-induced Power Supply Voltage Variation
As the power consumption of modern highperformance microprocessors increases beyond 100W, power becomes an increasingly important design consideration. This paper presents a novel...
Ed Grochowski, David Ayers, Vivek Tiwari
GLVLSI
2009
IEEE
123views VLSI» more  GLVLSI 2009»
15 years 11 months ago
Power efficient tree-based crosslinks for skew reduction
Clock distribution networks are an important design issue that is highly dependent on delay variations and load imbalances, while requiring power efficiency. Existing mesh solutio...
Inna Vaisband, Ran Ginosar, Avinoam Kolodny, Eby G...
HPCA
2005
IEEE
15 years 10 months ago
Exploring the Design Space of Power-Aware Opto-Electronic Networked Systems
As microprocessors become increasingly interconnected, the power consumed by the interconnection network can no longer be ignored. Moreover, with demand for link bandwidth increas...
Xuning Chen, Li-Shiuan Peh, Gu-Yeon Wei, Yue-Kai H...
HPCA
2008
IEEE
16 years 4 months ago
Power-Efficient DRAM Speculation
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti,...
HPCA
2005
IEEE
16 years 4 months ago
On the Limits of Leakage Power Reduction in Caches
If current technology scaling trends hold, leakage power dissipation will soon become the dominant source of power consumption in high performance processors. Caches, due to the f...
Yan Meng, Timothy Sherwood, Ryan Kastner