473 search results - page 25 / 95 » Dynamic Memory Design for Low Data-Retention Power |
ICCD
2006
IEEE
14 years 5 months ago
2006
IEEE
Abstract— Timing and low power emerge as the most important goals in contemporary design. Meanwhile, the majority of placement algorithms developed by industry and academia still...
MICRO
2000
IEEE
14 years 7 days ago
2000
IEEE
Data, addresses, and instructions are compressed by maintaining only significant bytes with two or three extension bits appended to indicate the significant byte positions. This s...
ISLPED
2010
ACM
13 years 9 months ago
2010
ACM
The on-chip memory is a dominant source of power and energy consumption in modern and future processors. This paper explores the use of a new emerging non-volatile memory technolo...
ISLPED
2003
ACM
14 years 1 months ago
2003
ACM
Tag comparison elimination (TCE) is an effective approach to reduce I-cache energy. Current research focuses on finding good tradeoffs between hardware cost and percentage of comp...
DAC
1999
ACM
14 years 9 months ago
1999
ACM
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...