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» Dynamic Voltage and Cache Reconfiguration for Low Power
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ICCD
2008
IEEE
111views Hardware» more  ICCD 2008»
14 years 4 months ago
Power switch characterization for fine-grained dynamic voltage scaling
—Dynamic voltage scaling (DVS) provides power savings for systems with varying performance requirements. One low overhead implementation of DVS uses PMOS power switches to connec...
Liang Di, Mateja Putic, John Lach, Benton H. Calho...
CASES
2007
ACM
13 years 11 months ago
Eliminating inter-process cache interference through cache reconfigurability for real-time and low-power embedded multi-tasking
We propose a technique which leverages configurable data caches to address the problem of cache interference in multitasking embedded systems. Data caches are often necessary to p...
Rakesh Reddy, Peter Petrov
CSREAESA
2003
13 years 8 months ago
Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
Kugan Vivekanandarajah, Thambipillai Srikanthan, C...
CORR
2010
Springer
76views Education» more  CORR 2010»
13 years 7 months ago
Study of Reconfigurable Mostly Digital Radio for Manet
We introduce the radio reconfigurability thanks to IRUWB mostly digital architecture for MANET context. This particular context implies some constraints on the radio interface suc...
Aubin Lecointre, Daniela Dragomirescu, Robert Plan...