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MICRO
2008
IEEE
136views Hardware» more  MICRO 2008»
14 years 2 months ago
Power to the people: Leveraging human physiological traits to control microprocessor frequency
Any architectural optimization aims at satisfying the end user. However, modern architectures execute with little to no knowledge about the individual user. If architectures could...
Alex Shye, Yan Pan, Benjamin Scholbrock, J. Scott ...
DAC
2004
ACM
14 years 8 months ago
Leakage aware dynamic voltage scaling for real-time embedded systems
A five-fold increase in leakage current is predicted with each technology generation. While Dynamic Voltage Scaling (DVS) is known to reduce dynamic power consumption, it also cau...
Ravindra Jejurikar, Cristiano Pereira, Rajesh K. G...
VLSID
2002
IEEE
192views VLSI» more  VLSID 2002»
14 years 15 days ago
Static and Dynamic Variable Voltage Scheduling Algorithms for Real-Time Heterogeneous Distributed Embedded Systems
à This paper addresses the problem of static and dynamic variable voltage scheduling of multi-rate periodic task graphs (i.e., tasks with precedence relationships) and aperiodic t...
Jiong Luo, Niraj K. Jha
ICCD
2006
IEEE
109views Hardware» more  ICCD 2006»
14 years 4 months ago
Improving Scalability and Complexity of Dynamic Scheduler through Wakeup-Based Scheduling
This paper presents a new scheduling technique to improve the speed, power, and scalability of a dynamic scheduler. In a high-performance superscalar processor, the instruction sc...
Kuo-Su Hsiao, Chung-Ho Chen
ISLPED
2010
ACM
229views Hardware» more  ISLPED 2010»
13 years 7 months ago
An energy efficient cache design using spin torque transfer (STT) RAM
The on-chip memory is a dominant source of power and energy consumption in modern and future processors. This paper explores the use of a new emerging non-volatile memory technolo...
Mitchelle Rasquinha, Dhruv Choudhary, Subho Chatte...