56 search results - page 6 / 12 » Efficient Backtracking Instruction Schedulers |
CASES
2008
ACM
13 years 9 months ago
2008
ACM
While customizable processors aim at combining the flexibility of general purpose processors with the speed and power advantages of custom circuits, commercially available process...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
On chip memories provide fast and energy efficient storage for code and data in comparison to caches or external memories. We present techniques and algorithms that allow for an au...
ISCA
2005
IEEE
14 years 1 months ago
2005
IEEE
One of the most important problems faced by microarchitecture designers is the poor scalability of some of the current solutions with increased clock frequencies and wider pipelin...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
The dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The d...
IEEEPACT
1999
IEEE
13 years 11 months ago
1999
IEEE
An asynchronous superscalar architecture is presented based on a novel architectural feature called instruction compounding. This enables efficient dynamic scheduling and forwardi...