Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on adjacent wires on long bus lines can increase delay...
— The work presented in this paper is about the design of current-controlled oscillators (ICO). Two ICOs are proposed. Aiming at reducing the duration of the short-circuit curren...
Modern digital IC designs have a critical operating point, or "wall of slack", that limits voltage scaling. Even with an errortolerance mechanism, scaling voltage below a...
Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, Jo...
We describe a new e-learning environment and a runtime platform for educational tools on digital system testing and design for testability. This environment is being developed in ...
Artur Jutman, Jaan Raik, Raimund Ubar, V. Vislogub...
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...