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ICCAD
2009
IEEE
133views Hardware» more  ICCAD 2009»
13 years 5 months ago
A parallel preconditioning strategy for efficient transistor-level circuit simulation
A parallel computing approach for large-scale SPICE-accurate circuit simulation is described that is based on a new preconditioned iterative solver. The preconditioner involves the...
Heidi Thornquist, Eric R. Keiter, Robert J. Hoekst...
ITC
2003
IEEE
110views Hardware» more  ITC 2003»
14 years 28 days ago
An extension to JTAG for at-speed debug on a system
When developing new designs, debugging the prototype is important to resolve application malfunction. During this board design debug, often a few pins of an IC are measured to che...
Leon van de Logt, Frank van der Heyden, Tom Waayer...
DATE
2008
IEEE
143views Hardware» more  DATE 2008»
14 years 2 months ago
Improving Synthesis of Compressor Trees on FPGAs via Integer Linear Programming
Multi-input addition is an important operation for many DSP and video processing applications. On FPGAs, multi-input addition has traditionally been implemented using trees of car...
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
FPL
2004
Springer
125views Hardware» more  FPL 2004»
14 years 1 months ago
SoftSONIC: A Customisable Modular Platform for Video Applications
This paper presents the Customisable Modular Platform (CMP) approach. The aim is to accelerate FPGA application developraising the level of abstraction and facilitating design reus...
Tero Rissa, Peter Y. K. Cheung, Wayne Luk
ISCAS
1994
IEEE
131views Hardware» more  ISCAS 1994»
13 years 11 months ago
An Efficient Design Method for Optimal Weighted Median Filtering
Earlier research has shown that the problem of optimal weighted median filtering with structural constraints can be formulated as a nonconvex nonlinear programming problem in gene...
Ruikang Yang, Moncef Gabbouj, Yrjö Neuvo