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» Efficient Hardware Voxelization
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PPOPP
1990
ACM
13 years 11 months ago
Employing Register Channels for the Exploitation of Instruction Level Parallelism
Abstract - A multiprocessor system capable of exploiting fine-grained parallelism must support efficient synchronization and data passing mechanisms. This paper demonstrates the us...
Rajiv Gupta
CASES
2007
ACM
13 years 11 months ago
A low power front-end for embedded processors using a block-aware instruction set
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...
Ahmad Zmily, Christos Kozyrakis
DAC
2010
ACM
13 years 11 months ago
LUT-based FPGA technology mapping for reliability
As device size shrinks to the nanometer range, FPGAs are increasingly prone to manufacturing defects. We anticipate that the ability to tolerate multiple defects will be very impo...
Jason Cong, Kirill Minkovich
CF
2006
ACM
13 years 11 months ago
The potential of the cell processor for scientific computing
The slowing pace of commodity microprocessor performance improvements combined with ever-increasing chip power demands has become of utmost concern to computational scientists. As...
Samuel Williams, John Shalf, Leonid Oliker, Shoaib...
LCTRTS
2000
Springer
13 years 11 months ago
An Integrated Push/Pull Buffer Management Method in Multimedia Communication Environments
Multimedia communication systems require not only high-performance computer hardware and highspeed networks, but also a buffer management mechanism to process voluminous data effi...
Sungyoung Lee, Hyonwoo Seung, Taewoong Jeon