555 search results - page 105 / 111 » Efficient event-driven simulation of parallel processor arch... |
GCC
2005
Springer
14 years 1 months ago
2005
Springer
Web caching has been well accepted as a viable method for saving network bandwidth and reducing user access latency. To provide cache sharing on a large scale, hierarchical web cac...
DATE
2010
IEEE
14 years 19 days ago
2010
IEEE
—Multi-Processor System-on-Chips (MPSoCs) exploit task-level parallelism to achieve high computation throughput, but concurrent memory accesses from multiple PEs may cause memory...
HPCA
2006
IEEE
14 years 8 months ago
2006
IEEE
As increasingly larger memories are used to bridge the widening gap between processor and disk speeds, main memory energy consumption is becoming increasingly dominant. Even thoug...
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...
IEEEPACT
2008
IEEE
14 years 1 months ago
2008
IEEE
Communication overheads are one of the fundamental challenges in a multiprocessor system. As the number of processors on a chip increases, communication overheads and the distribu...