120 search results - page 15 / 24 » Efficient hardware code generation for FPGAs |
CASES
2006
ACM
13 years 11 months ago
2006
ACM
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
ISSS
1999
IEEE
13 years 11 months ago
1999
IEEE
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
Channel coding is a key element of any digital wireless communication system since it minimizes the effects of noise and interference on the transmitted signal. In thirdgeneration...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
The inherent reconfigurability of SRAM-based FPGAs enables the use of configurations optimized for the problem at hand. Optimized configurations are smaller and faster than their g...
CODES
2007
IEEE
13 years 11 months ago
2007
IEEE
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power ...