258 search results - page 29 / 52 » Efficient memory simulation in SimICS |
DAC
2005
ACM
14 years 8 months ago
2005
ACM
We propose two novel integration techniques -- bypass and bookkeeping -- in the memory controller to address the cache coherence compatibility issue of a non-shared bus heterogene...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper we analyze the test power of SRAM memories and demonstrate that the full functional precharge activity is not necessary during test mode because of the predictable a...
DATE
2002
IEEE
14 years 19 days ago
2002
IEEE
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
MICRO
2000
IEEE
14 years 1 days ago
2000
IEEE
Virtual machine service threads can perform many tasks in parallel with program execution such as garbage collection, dynamic compilation, and profile collection and analysis. Har...
IPPS
1999
IEEE
13 years 12 months ago
1999
IEEE
In this paper we propose a simple extension to the I/O architecture of scalable multiprocessors that optimizes page swap-outs significantly. More specifically, we propose the use o...