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» Efficient symbolic multi-objective design space exploration
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JRTIP
2008
249views more  JRTIP 2008»
13 years 9 months ago
Model-based mapping of reconfigurable image registration on FPGA platforms
Abstract Image registration is a computationally intensive application in the medical imaging domain that places stringent requirements on performance and memory management efficie...
Mainak Sen, Yashwanth Hemaraj, William Plishker, R...
INFOVIS
2005
IEEE
14 years 2 months ago
The Visual Code Navigator: An Interactive Toolset for Source Code Investigation
We present the Visual Code Navigator, a set of three interrelated visual tools that we developed for exploring large source code software projects from three different perspective...
Gerard Lommerse, Freek Nossin, Lucian Voinea, Alex...
DAC
2003
ACM
14 years 2 months ago
Improved indexing for cache miss reduction in embedded systems
The increasing use of microprocessor cores in embedded systems as well as mobile and portable devices creates an opportunity for customizing the cache subsystem for improved perfo...
Tony Givargis
TCAD
2008
103views more  TCAD 2008»
13 years 9 months ago
Topology-Based Performance Analysis and Optimization of Latency-Insensitive Systems
Latency-insensitive protocols allow system-on-chip (SoC) engineers to decouple the design of the computing cores from the design of the intercore communication channels while follo...
Rebecca L. Collins, Luca P. Carloni
ICCAD
1999
IEEE
115views Hardware» more  ICCAD 1999»
14 years 1 months ago
Fast performance analysis of bus-based system-on-chip communication architectures
This paper addresses the problem of efficient and accurate performance analysis to drive the exploration and design of bus-based System-on-Chip (SOC) communication architectures. ...
Kanishka Lahiri, Anand Raghunathan, Sujit Dey