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ICCAD
2002
IEEE
129views Hardware» more  ICCAD 2002»
14 years 6 months ago
Transmission line design of clock trees
We investigate appropriate regimes for transmission line propagation of signals on digital integrated circuits. We start from exact solutions to the transmission line equations pr...
Rafael Escovar, Roberto Suaya
FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
14 years 3 months ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier
MICRO
2008
IEEE
208views Hardware» more  MICRO 2008»
14 years 4 months ago
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
Wangyuan Zhang, Tao Li
ACMSE
2006
ACM
14 years 3 months ago
HELLAS: a specialized architecture for interactive deformable object modeling
Applications involving interactive modeling of deformable objects require highly iterative, floating-point intensive numerical simulations. As the complexity of these models incr...
Shrirang M. Yardi, Benjamin Bishop, Thomas P. Kell...
ANCS
2005
ACM
14 years 3 months ago
A novel reconfigurable hardware architecture for IP address lookup
IP address lookup is one of the most challenging problems of Internet routers. In this paper, an IP lookup rate of 263 Mlps (Million lookups per second) is achieved using a novel ...
Hamid Fadishei, Morteza Saheb Zamani, Masoud Sabae...