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» Electronic circuit reliability modeling
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ICCAD
2010
IEEE
126views Hardware» more  ICCAD 2010»
13 years 7 months ago
Characterizing the lifetime reliability of manycore processors with core-level redundancy
With aggressive technology scaling, integrated circuits suffer from everincreasing wearout effects and their lifetime reliability has become a serious concern for the industry. Fo...
Lin Huang, Qiang Xu
DATE
2010
IEEE
180views Hardware» more  DATE 2010»
14 years 2 months ago
Reliability- and process variation-aware placement for FPGAs
Abstract—Negative bias temperature instability (NBTI) significantly affects nanoscale integrated circuit performance and reliability. The degradation in threshold voltage (Vth) d...
Assem A. M. Bsoul, Naraig Manjikian, Li Shang
DSN
2005
IEEE
14 years 3 months ago
Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files
Register files are in the critical path of most high-performance processors and their latency is one of the most important factors that limit their size. Our goal is to develop er...
Gokhan Memik, Masud H. Chowdhury, Arindam Mallik, ...
DAC
1998
ACM
14 years 10 months ago
A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
Nuno Alexandre Marques, Mattan Kamon, Jacob White,...
DAC
2006
ACM
14 years 3 months ago
Modeling and minimization of PMOS NBTI effect for robust nanometer design
Negative bias temperature instability (NBTI) has become the dominant reliability concern for nanoscale PMOS transistors. In this paper, a predictive model is developed for the deg...
Rakesh Vattikonda, Wenping Wang, Yu Cao