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» Electronic circuit reliability modeling
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ICCD
2001
IEEE
213views Hardware» more  ICCD 2001»
14 years 6 months ago
Analysis and Reduction of Capacitive Coupling Noise in High-Speed VLSI Circuits
Abstract-- Scaling the minimum feature size of VLSI circuits to sub-quarter micron and its clock frequency to 2GHz has caused crosstalk noise to become a serious problem, that degr...
Payam Heydari, Massoud Pedram
VTS
2008
IEEE
104views Hardware» more  VTS 2008»
14 years 4 months ago
Signature Rollback - A Technique for Testing Robust Circuits
Dealing with static and dynamic parameter variations has become a major challenge for design and test. To avoid unnecessary yield loss and to ensure reliable system operation a ro...
Uranmandakh Amgalan, Christian Hachmann, Sybille H...
ICCAD
2004
IEEE
88views Hardware» more  ICCAD 2004»
14 years 6 months ago
Interconnect lifetime prediction under dynamic stress for reliability-aware design
Thermal effects are becoming a limiting factor in highperformance circuit design due to the strong temperaturedependence of leakage power, circuit performance, IC package cost and...
Zhijian Lu, Wei Huang, John Lach, Mircea R. Stan, ...
TCAD
2008
75views more  TCAD 2008»
13 years 9 months ago
An Efficient Graph-Based Algorithm for ESD Current Path Analysis
Abstract--The electrostatic discharge (ESD) problem has become a challenging reliability issue in nanometer-circuit design. High voltages that resulted from ESD might cause high cu...
Chih-Hung Liu, Hung-Yi Liu, Chung-Wei Lin, Szu-Jui...
ISLPED
2009
ACM
168views Hardware» more  ISLPED 2009»
14 years 4 months ago
Low power circuit design based on heterojunction tunneling transistors (HETTs)
The theoretical lower limit of subthreshold swing in MOSFETs (60 mV/decade) significantly restricts low voltage operation since it results in a low ON to OFF current ratio at low ...
Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, ...