363 search results - page 35 / 73 » Enabling High Performance Data Transfer on Cluster Architect... |
117
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FCCM
2006
IEEE
15 years 10 months ago
2006
IEEE
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...
237
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ASPDAC
2008
ACM
15 years 6 months ago
2008
ACM
A major trend in a modern system-on-chip design is a growing system complexity, which results in a sharp increase of communication traffic on the on-chip communication bus architec...
120
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HPCC
2007
Springer
15 years 10 months ago
2007
Springer
This paper presents a new algorithm for computing the singular value decomposition (SVD) on multilevel memory hierarchy architectures. This algorithm is based on one-sided JRS iter...
152
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MICRO
2003
IEEE
15 years 9 months ago
2003
IEEE
Data-parallel programs are both growing in importance and increasing in diversity, resulting in specialized processors targeted at specific classes of these programs. This paper ...
157
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GCC
2005
Springer
15 years 10 months ago
2005
Springer
Spatial Information Grid (SIG) is a project of applying grid technology to share and integrate spatial data resources, information processing resources, equipment resources, and kn...