395 search results - page 22 / 79 » Encoding Algorithms for Logic Synthesis |
126
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ICCAD
1995
IEEE
15 years 5 months ago
1995
IEEE
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
112
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ICIP
2002
IEEE
16 years 4 months ago
2002
IEEE
The JPEG-LS algorithm is one of the recently designated standards for lossless compression of grayscale and color images. In this paper, simulation results for lossless and near l...
DAC
2006
ACM
16 years 3 months ago
2006
ACM
Highly regular, nanodevice based architectures have been proposed to replace pure CMOS based architectures in the emerging post CMOS era. Since bottom-up self-assembly is used to ...
118
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ICCAD
2006
IEEE
15 years 11 months ago
2006
IEEE
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...
143
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GECCO
2008
Springer
15 years 3 months ago
2008
Springer
The choice of an appropriate hardware representation model is key to successful evolution of digital circuits. One of the most popular models is cartesian genetic programming, whi...