319 search results - page 13 / 64 » Energy minimization using multiple supply voltages |
150
Voted
TVLSI
2002
15 years 3 months ago
2002
The performance of many modern computer and communication systems is dictated by the latency of communication pipelines. At the same time, power/energy consumption is often another...
164
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CODES
2007
IEEE
15 years 5 months ago
2007
IEEE
In this paper, we propose an efficient technique for run-time application mapping onto Network-on-Chip (NoC) platforms with multiple voltage levels. Our technique consists of a re...
124
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ISQED
2008
IEEE
15 years 10 months ago
2008
IEEE
SRAM leakage power dominates the total power of low duty-cycle applications, e.g., sensor nodes. Accordingly, leakage power reduction during data-retention in SRAM standby is ofte...
132
Voted
VLSID
2001
IEEE
16 years 4 months ago
2001
IEEE
Abstract - An adaptive approach for dynamic voltage scheduling on processors is presented based on workload prediction by filtering a trace history. The effects of update frequency...
113
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ICCD
2007
IEEE
16 years 29 days ago
2007
IEEE
The cache hierarchy of state-of-the-art—especially multicore—microprocessors consumes a significant amount of area and energy. A significant amount of research has been devo...