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CODES
2005
IEEE
14 years 1 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
ISCA
2005
IEEE
117views Hardware» more  ISCA 2005»
14 years 1 months ago
Store Vulnerability Window (SVW): Re-Execution Filtering for Enhanced Load Optimization
The load-store unit is a performance critical component of a dynamically-scheduled processor. It is also a complex and non-scalable component. Several recently proposed techniques...
Amir Roth
SIGCOMM
2005
ACM
14 years 1 months ago
Fast hash table lookup using extended bloom filter: an aid to network processing
Hash table is used as one of the fundamental modules in several network processing algorithms and applications such as route lookup, packet classification, per-flow state manage...
Haoyu Song, Sarang Dharmapurikar, Jonathan S. Turn...
WWW
2005
ACM
14 years 1 months ago
How to make web sites talk together: web service solution
Integrating web sites to provide more efficient services is a very promising way in the Internet. For example searching house for rent based on train system or preparing a holiday...
Hoang Pham Huy, Takahiro Kawamura, Tetsuo Hasegawa
ATAL
2005
Springer
14 years 1 months ago
From team plan to individual plans: a petri net-based approach
This paper focuses on a framework for representing a team plan and its projections on individual agents. The team plan is represented with a coloured Petri net. Using the implicit...
Olivier Bonnet-Torrés, Catherine Tessier