146 search results - page 3 / 30 » Enhanced clustered voltage scaling for low power |
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
TCAD
2010
13 years 2 months ago
2010
Abstract--This paper presents a technology mapping algorithm for field-programmable gate array architectures with dual supply voltages (Vdds) for power optimization. This is done w...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
We investigate trade-offs in microprocessor frequency and system power achievable for low temperature operation in scaled high leakage technologies by combining refrigeration with...
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
— A new low voltage swing circuit technique based on a dual threshold voltage CMOS technology is presented in this paper for simultaneously reducing active and standby mode power...
SAMOS
2007
Springer
14 years 1 months ago
2007
Springer
When peak performance is unnecessary, Dynamic Voltage Scaling (DVS) can be used to reduce the dynamic power consumption of embedded multiprocessors. In future technologies, however...