43 search results - page 8 / 9 » Equivalence Checking of Reversible Circuits |
DAC
2009
ACM
14 years 8 months ago
2009
ACM
Continuously shrinking feature sizes result in an increasing susceptibility of circuits to transient faults, e.g. due to environmental radiation. Approaches to implement fault tol...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
Abstract-- SAT sweeping is the process of merging two or more functionally equivalent nodes in a circuit by selecting one of them to represent all the other equivalent nodes. This ...
ICCAD
1996
IEEE
13 years 11 months ago
1996
IEEE
We propose a new method for generating BDDs from hardware algorithm descriptions written in a programming language. Our system can deal with control structures, such as conditiona...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
The problem of diagnosis – or locating the source of an error or fault – occurs in several areas of Computer Aided Design, such as dynamic verification, property checking, eq...
TOCL
2008
13 years 7 months ago
2008
State Machines Capture Parallel Algorithms: Correction and Extension ANDREAS BLASS University of Michigan and YURI GUREVICH Microsoft Research We consider parallel algorithms worki...