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ACMMSP
2005
ACM
106views Hardware» more  ACMMSP 2005»
14 years 8 days ago
Impact of modern memory subsystems on cache optimizations for stencil computations
In this work we investigate the impact of evolving memory system features, such as large on-chip caches, automatic prefetch, and the growing distance to main memory on 3D stencil ...
Shoaib Kamil, Parry Husbands, Leonid Oliker, John ...
ASPLOS
2010
ACM
14 years 1 months ago
A real system evaluation of hardware atomicity for software speculation
In this paper we evaluate the atomic region compiler abstraction by incorporating it into a commercial system. We find that atomic regions are simple and intuitive to integrate i...
Naveen Neelakantam, David R. Ditzel, Craig B. Zill...
ISCAPDCS
2003
13 years 8 months ago
Utilization of Separate Caches to Eliminate Cache Pollution Caused by Memory Management Functions
Data intensive service functions such as memory allocation/de-allocation, data prefetching, and data relocation can pollute processor cache in conventional systems since the same ...
Mehran Rezaei, Krishna M. Kavi
CASES
2007
ACM
13 years 10 months ago
Eliminating inter-process cache interference through cache reconfigurability for real-time and low-power embedded multi-tasking
We propose a technique which leverages configurable data caches to address the problem of cache interference in multitasking embedded systems. Data caches are often necessary to p...
Rakesh Reddy, Peter Petrov
ISLPED
2009
ACM
132views Hardware» more  ISLPED 2009»
14 years 1 months ago
Enabling ultra low voltage system operation by tolerating on-chip cache failures
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...