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FPL
2000
Springer
155views Hardware» more  FPL 2000»
13 years 11 months ago
Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs
This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state as...
Valery Sklyarov
DATE
2009
IEEE
88views Hardware» more  DATE 2009»
14 years 2 months ago
Rewiring using IRredundancy Removal and Addition
—Redundancy Addition and Removal (RAR) is a restructuring technique used in the synthesis and optimization of logic designs. It can remove an existing target wire and add an alte...
Chun-Chi Lin, Chun-Yao Wang
GLVLSI
2011
IEEE
351views VLSI» more  GLVLSI 2011»
12 years 11 months ago
Design of low-power multiple constant multiplications using low-complexity minimum depth operations
Existing optimization algorithms for the multiplierless realization of multiple constant multiplications (MCM) typically target the minimization of the number of addition and subt...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...
DATE
2007
IEEE
112views Hardware» more  DATE 2007»
14 years 2 months ago
Automatic synthesis of compressor trees: reevaluating large counters
Despite the progress of the last decades in electronic design automation, arithmetic circuits have always received way less attention than other classes of digital circuits. Logic...
Ajay K. Verma, Paolo Ienne
FPGA
2005
ACM
95views FPGA» more  FPGA 2005»
14 years 1 months ago
The Stratix II logic and routing architecture
This paper describes the Altera Stratix II™ logic and routing architecture. This architecture features a novel adaptive logic module (ALM) that is based on a 6-LUT, but can be p...
David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaugh...