57 search results - page 9 / 12 » Exact combinational logic synthesis and non-standard circuit... |
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
CDES
2008
13 years 9 months ago
2008
In this paper an algorithm is proposed for the synthesis and exact minimization of ESCT (Exclusive or Sum of Complex Terms) expressions for Boolean functions of up to seven comple...
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...