Abstract--Networks-on-Chip (NoC) have emerged as a replacement for traditional shared-bus designs for on-chip communications. As with all current VLSI designs, however, reducing po...
Tushar N. K. Jain, Paul V. Gratz, Alexander Sprint...
This paper introduces pass-transistor logic design with dualthreshold voltages. A set of single-rail, fully restored, passtransistor gates are presented. Logic transistors are imp...
Lara D. Oliver, Krishnendu Chakrabarty, Hisham Z. ...
Abstract. We report on the use of model checking techniques for both the verification of a process control program and the derivation of optimal control schedules. Most of this wor...
A novel high-level approach for estimating power consumption of global interconnects in data-path oriented designs implemented in FPGAs is presented. The methodology is applied to...
Low-Density Parity-Check (LDPC) codes have been adopted in the physical layer of many communication systems because of their superior performance. The direct implementation of the...