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» Experiences with Soft-Core Processor Design
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VLSID
2003
IEEE
77views VLSI» more  VLSID 2003»
14 years 9 months ago
A Methodology for Accurate Modeling of Energy Dissipation in Array Structures
There is an increasing need for obtaining a reasonably accurate estimate of energy dissipation in SoC designs. Array structures have a significant contribution to the total system...
Mahesh Mamidipaka, Nikil D. Dutt, Kamal S. Khouri
EMSOFT
2005
Springer
14 years 2 months ago
Compiler-guided register reliability improvement against soft errors
With the scaling of technology, transient errors caused by external particle strikes have become a critical challenge for microprocessor design. As embedded processors are widely ...
Jun Yan, Wei Zhang
CASES
2005
ACM
13 years 11 months ago
Exploiting pipelining to relax register-file port constraints of instruction-set extensions
Customisable embedded processors are becoming available on the market, thus making it possible for designers to speed up execution of applications by using Application-specific F...
Laura Pozzi, Paolo Ienne
DATE
2009
IEEE
149views Hardware» more  DATE 2009»
14 years 3 months ago
An ILP formulation for task mapping and scheduling on multi-core architectures
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tugh...
DDECS
2007
IEEE
143views Hardware» more  DDECS 2007»
14 years 3 months ago
Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
Pavel Kubalík, Jirí Kvasnicka, Hana ...