Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...
Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He
the interconnection among the IP cores with all description levels This paper presents an automatic interconnection rectification (AIR)technique to correct the misplaced interconne...
Since their invention in the 1980s, the logic density of FPGAs has increased exponentially with time. This increase of logic density first led to the development of synthesisable ...
Gildas Genest, Richard Chamberlain, Robin J. Bruce
Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
Most evolutionary approaches to fault recovery in FPGAs focus on evolving alternative logic configurations as opposed to evolving the intra-cell routing. Since the majority of tra...
Jason D. Lohn, Gregory V. Larchev, Ronald F. DeMar...