363 search results - page 66 / 73 » FPGA interconnect design using logical effort |
HEURISTICS
2002
13 years 7 months ago
2002
In this paper, we present the parallelization of tabu search on a network of workstations using PVM. Two parallelization strategies are integrated: functional decomposition strate...
TVLSI
1998
13 years 7 months ago
1998
— Wave pipelining offers a unique combination of high speed, low latency, and moderate power consumption. The construction of wave pipelines is benefited by the use of gates and...
RAID
1999
Springer
13 years 11 months ago
1999
Springer
: I will discuss two efforts to get Intrusion Detection Systems to work together - the Common Intrusion Detection Framework (CIDF), and the IETF's working group to develop an ...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...