87 search results - page 15 / 18 » FPGA technology mapping: a study of optimality |
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper, we present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology ...
ARITH
2007
IEEE
13 years 11 months ago
2007
IEEE
The study of specific hardware circuits for the evaluation of floating-point elementary functions was once an active research area, until it was realized that these functions were...
CISS
2011
IEEE
12 years 11 months ago
2011
IEEE
—In this paper, we consider the amplified-and-forward relaying in a multichannel system with linear processing capability at the relay. We propose an analytical approach to stud...
SIGIR
2008
ACM
13 years 7 months ago
2008
ACM
One of the central issues in learning to rank for information retrieval is to develop algorithms that construct ranking models by directly optimizing evaluation measures used in i...
ICCAD
1999
IEEE
13 years 11 months ago
1999
IEEE
Typically,cell parameterssuch as the pin-to-pinintrinsicdelays, load-dependentcoe cients,andinputpin capacitanceshavedifferent values for rising and falling signals. The performan...