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ICCD
2006
IEEE
103views Hardware» more  ICCD 2006»
14 years 4 months ago
Architectural Support for Run-Time Validation of Control Flow Transfer
—Current micro-architecture blindly uses the address in the program counter to fetch and execute instructions without validating its legitimacy. Whenever this blind-folded instru...
Yixin Shi, Sean Dempsey, Gyungho Lee
ICCD
2004
IEEE
114views Hardware» more  ICCD 2004»
14 years 4 months ago
Low Energy, Highly-Associative Cache Design for Embedded Processors
Many embedded processors use highly associative data caches implemented using a CAM-based tag search. When high-associativity is desirable, CAM designs can offer performance advan...
Alexander V. Veidenbaum, Dan Nicolaescu
ICCD
2002
IEEE
128views Hardware» more  ICCD 2002»
14 years 4 months ago
Subword Sorting with Versatile Permutation Instructions
Subword parallelism has succeeded in accelerating many multimedia applications. Subword permutation instructions have been proposed to efficiently rearrange subwords in or among r...
Zhijie Shi, Ruby B. Lee
MICRO
2006
IEEE
103views Hardware» more  MICRO 2006»
14 years 1 months ago
NoSQ: Store-Load Communication without a Store Queue
This paper presents NoSQ (short for No Store Queue), a microarchitecture that performs store-load communication without a store queue and without executing stores in the outof-ord...
Tingting Sha, Milo M. K. Martin, Amir Roth
ITC
2003
IEEE
148views Hardware» more  ITC 2003»
14 years 1 months ago
Linearity Testing of Precision Analog-to-Digital Converters Using Stationary Nonlinear Inputs
As the performance of Analog-to-Digital Converters continues to improve, it is becoming more challenging and costly to develop sufficiently fast and low-drift signal generators th...
Le Jin, Kumar L. Parthasarathy, Turker Kuyel, Dega...