In this paper we present a centralized flow control scheme in NoCs in the presence of both elastic and streaming flow traffic paradigms. We model the desired Best Effort (BE) sour...
With the shift towards deep sub-micron (DSM) technologies, the increase in leakage power and the adoption of poweraware design methodologies have resulted in potentially significa...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-proc...
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
As the level of chip integration continues to advance at a fast pace, the desire for efficient interconnects-whether on-chip or off-chip--is rapidly increasing. Traditional interc...