372 search results - page 46 / 75 » Fault simulation on reconfigurable hardware |
ISCAS
2007
IEEE
14 years 3 months ago
2007
IEEE
—Accurate analog models of power system components are required in order to realize an analog computation engine for power systems. Analog computation is an area of continued int...
ICASSP
2011
IEEE
13 years 27 days ago
2011
IEEE
Decoder architectures for architecture-aware Raptor codes having regular message access-and-processing patterns are presented. Raptor codes are a class of concatenated codes compo...
DAC
2006
ACM
14 years 10 months ago
2006
ACM
Modern integrated circuits (ICs) are becoming increasingly complex. The complexity makes it difficult to design, manufacture and integrate these high-performance ICs. The advent o...
ISMVL
2007
IEEE
14 years 3 months ago
2007
IEEE
In this paper we present fault tolerant CMOS logic using redundancy and ternary signals. The ternary gates are implemented using recharge logic which can be exploited in binary an...
TVLSI
2008
2008
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
13 years 9 months ago
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...